This invention relates to an impedance adjusting circuit for adjusting impedance in a circuit and more particularly to a circuit preferably used in a trimming circuit for frequency adjustment of an active filter, to improve accuracy in A/D, D/A converters, etc.
An active filter is a circuit performing filtering which has an active element as a main part. Such active filter is generally composed of an operational amplifier, resistors and capacitors. Its frequency characteristics is determined by values of the resistors and the capacitors.
However, the values of the resistors and the capacitors tend to be varied due to variations of width, thickness and impurity concentration, which may vary in manufacturing process therefor.
From a point of view that there are variations in values of elements, in order to compensate frequency offset of an active filter, resistance and/or capacitance is trimmed. This trimming is conventionally performed by switching over a set of switches to select paths for adjustment, which results in fine adjustment of elements.
FIG. 1 is a circuit diagram of a typical active filter, which is a double feedback low pass filter.
In this circuit, series-connected resistors R1 and R2 are provided between an input terminal IN of this filter and a reverse input terminal of an operational amplifier OP, there is also provided a capacitor C1 between a ground and a common node of the resistors R1 and R2. Furthermore, a capacitor C2 is connected between an output terminal OUT of the operational amplifier OP and the reverse input terminal thereof, and a resistor R3 is connected between the output terminal OUT and the common node of the resistors R1 and R2.
A cut-off frequency characteristic fc in this active filter is given as   fc  =      1          2      ⁢      π      ⁢                        R2          ·          R3          ·          C1          ·          C2                    
From this equation, it is understood that the frequency characteristic is adjusted by changing at least one of the resistors and/or the capacitors.
Next, an actual trimming method explained.
FIG. 2 is a circuit diagram of an adjusting circuit (trimming circuit) for adjusting a capacitor, for example, appeared in FIG. 1. In this figure, capacitors C11, C12, C13 and C14 having capacitance of 1C, 2C, 4C and 8C (C is a reference capacitance value) are respectively series-connected with corresponding switches SW1, SW2, SW3 and SW4 and these four sets of series-connected capacitor and switch are connected in parallel. By combining ON states of switches SW1-SW4, capacitance can be adjusted in a range of 1C-15C by 1C step.
However, since this adjusting circuit uses a plurality of switches SW1-SW4 of the same size, and as a result they have the same ON state resistance R, synthesized impedance of the ON resistance and capacitance are not in proportion to paths selected, and therefore there remains effect of jxcfx89 component.
As a result, as shown in FIG. 3, frequency can be changed by trimming step by step, but there is a problem that the peak level around cut-off frequency also changes.
It is therefore an object of the invention to provide an impedance adjusting circuit which sets accurate impedance ratio.
It is another object of the invention to provide an impedance adjusting circuit which performs accurate trimming without generating any peak level change when applied to a filter circuit.
According to one aspect of the present invention, there is provided an impedance adjusting circuit an impedance adjusting circuit comprising:
a plurality of paths between two terminals; and
an impedance adjustment section provided in each of the paths, said impedance adjustment section having at least a switching element and an impedance element which are connected in series;
wherein synthesized impedances of ON resistance of the switch element and the impedance element of the paths are set so that the synthesized impedance have a predetermined relation.
According to other aspect of the present invention, there is provided an impedance adjusting circuit comprising:
a plurality (1st to n-th) of switch elements one ends thereof being connected to a first terminal;
a first resistance element connected between the other end of the first switch and a second terminal;
an n-th resistance element connected between the other ends of the n-th switch and (n-1)th switch;
wherein synthesized impedances of paths when corresponding switches are ON are set to have a predetermined proportional relation.